What is ERC
ERC, short for Electrical Rule Check, is a methodology to verify the electrical integrity and compliance of a PCB design. By subjecting the design to a set of predefined electrical rules, ERC aims to identify any potential issues or violations that could impact the functionality and performance of the PCB.
In practical terms, ERC plays a vital role in driving performance analysis within PCB design processes that involve multiple PCBs, geographically dispersed design teams, and chipsets from various vendors. To ensure effective implementation, it is recommended to adopt an ERC solution that supports multi-rule sets, multi-user, and multi-engine models, particularly for enterprise-wide ventures.
One key aspect of ERC is the availability of separate private and public rule sets. Private rule sets are intended for internal use, while public rule sets can be utilized by customers and partners. Additionally, the use of encrypted ERC rule sets is highly encouraged as it facilitates lightweight analysis engines for performance checking. This allows for the enforcement of design guidelines and adherence to chipset-centric requirements.
Moreover, ERC rule sets find application in scenarios where certain PCBs within a multi-board system are outsourced to an Original Design Manufacturer (ODM). In such cases, these rule sets can augment or replace visual inspection methods during incoming inspection and design reviews. ODMs can develop their own encrypted ERC rule sets, which become part of their standard design practices and expedite the acceptance of designs by customers.
Furthermore, encrypted ERC rule sets hold significant importance in the PCB design and manufacturing food chain. Universities, consultants, material suppliers, and component providers can securely deliver their own electrical rule IP to PCB engineers using these rule sets. This aspect becomes increasingly critical as PCB speeds rise and necessitate more exhaustive performance verification.
Additionally, component manufacturers can provide rule sets that define power delivery/isolation rules or recommend interconnect topologies for critical signals. This utilization of ERC rule sets ensures the proper use of components, ultimately enhancing overall design quality and performance margins.
In terms of workflow, concurrent ERC with layout is essential when dealing with multiple PCBs designed across geographically dispersed design teams. Layout engineers can run multiple rule sets on a network of computers, with a concurrent analysis tool manager assigning different ERC runs to different network servers. This concurrent analysis approach allows for multiple rule checks and violation resolutions to be performed simultaneously with the layout process.